Quantum circuit design explained: gates, compilation and error correction

What is a quantum circuit?

Amazon's Braket documentation describes gate-based, also called circuit-based, quantum computing: a computation is broken down into elementary operations called gates, and the quantum circuit is the instruction set that defines the computation. (Analog Hamiltonian simulation devices, which it describes as typically special-purpose rather than universal, work differently and are not covered here.) Qiskit's documentation puts it more simply: a collection of qubits and a list of instructions that act on those qubits.

A circuit diagram is read left to right. Each horizontal line is one qubit, time flows from left to right, and boxes on the lines are gates applied in that order. Because quantum operations are unitary, and therefore reversible, every box has exactly as many wires leaving it as entering it (Microsoft's circuit conventions). Cirq groups gates that act in the same time slice into moments, which is a useful way to picture how many layers a circuit has.

Two facts make this model practical. First, a small set of gates is enough. A 1995 paper by Barenco and colleagues showed that one-qubit gates plus the two-qubit controlled-NOT can express any unitary operation on any number of qubits. That is why a chip can offer only a few native gates and still run any circuit, once a compiler has rewritten it.

Second, measurement is probabilistic. Measuring a qubit collapses its state to 0 or 1, with probabilities set by the amplitudes of its superposition (Microsoft Learn). So a circuit is run many times. Each execution and measurement is called a shot, and the result is a histogram of bitstrings rather than a single answer.

This is also the main difference from a classical logic circuit. An AND gate takes two bits and returns one, so it throws information away. A quantum gate cannot, which is why arithmetic on a quantum computer has to be built from reversible gates such as the three-qubit Toffoli.

What quantum circuit design involves

Designing a circuit means turning an algorithm into gates, then making that gate list as cheap as possible to run. What counts as cheap depends on the hardware generation:

• Two-qubit gate count. Two-qubit gates are the least accurate operations on today's chips. Quantinuum's Helios, launched in November 2025, quotes 99.9975% fidelity for one-qubit gates and 99.921% for two-qubit gates. Compilation adds more of them: a SWAP costs three CNOTs, and a Toffoli can cost up to six CNOTs plus single-qubit gates once decomposed.
• Depth. Fewer layers of gates means less time for qubits to lose their state (more on that below).
• Width. The number of qubits, including helper qubits that hold intermediate values. Reversible logic adds constant inputs and leftover "garbage" outputs that still occupy qubits.
• T-count, for the error-corrected era. In July 2026 IBM wrote that T-gate counts are expected to replace two-qubit operations as the most challenging operations that define a fault-tolerant system's capability.

Designers work at three levels: the algorithm (which operations, in principle), synthesis (building large operations such as multi-controlled gates or adders from smaller ones), and compilation for one specific chip, which the next section covers. A good design at the first two levels gives the compiler less to fix.

The 2024 reversible multiplier result, in context

The August 2024 news that the first version of this page reported matches a paper by researchers at the Dezful branch of Islamic Azad University in Iran, with a co-author at the German Research Centre for Artificial Intelligence (DFKI) and the University of Bremen. It was published online on December 28, 2023 in Frontiers of Computer Science. The authors proposed six parity-preserving reversible building blocks, synthesized them as multiple-control Toffoli gates, optimized them and translated them into elementary quantum gates from the NCV library, then used them to build a full adder and signed and unsigned multipliers.

Two details are easy to misread. The headline saving, an average of 25.04% in quantum cost for 4-bit unsigned multipliers compared with recent designs (18.59% for 5-bit signed ones), is a saving in gate cost, not in money or energy. And parity preservation means the parity of the outputs always equals the parity of the inputs, so a fault that flips a single bit shows up as a mismatch. That is fault detection for reversible logic, useful in arithmetic blocks, and a different thing from quantum error correction, which protects superpositions and is covered below.

How a circuit is compiled for real hardware

A circuit you write is abstract: any gate, between any two qubits. A processor only accepts circuits that match its instruction set architecture (ISA): its native gates, and its coupling map, the list of qubit pairs that can run a two-qubit gate together. Native gates are the ones the control system maps directly to control pulses. On IBM processors the single-qubit set is RZ, SX, X and ID, and the two-qubit gate is CZ on Heron and Nighthawk chips or ECR on the older Eagle (IBM's QPU guide). RZ is virtual: it is done in software and reported with zero error.

Connectivity differs just as much between machines:

Compiling, which Qiskit calls transpiling, closes the gap. Qiskit's preset pipeline has six stages:

1. Init. Breaks gates on three or more qubits into one- and two-qubit gates, because most layout and routing algorithms only handle those.
2. Layout. Chooses which physical qubit plays each circuit qubit. VF2Layout looks for a perfect placement that needs no SWAPs and, if there are several, picks the one with the lowest average error; otherwise SabreLayout searches heuristically.
3. Routing. Inserts SWAP gates so every two-qubit gate acts on neighbours. Finding the minimum number of SWAPs is NP-hard, so Qiskit uses SabreSwap, a stochastic heuristic based on the SABRE algorithm published in 2018.
4. Translation. Rewrites every gate in the native gate set, which usually increases depth and gate count.
5. Optimization. Merges chains of single-qubit gates, cancels gates that undo each other and, at optimization level 3, resynthesizes blocks of two-qubit gates. Levels run from 0 to 3; higher levels optimize harder and take longer.
6. Scheduling. Optional. Accounts for idle time with explicit delays, where passes such as dynamical decoupling can be added.

Cirq describes the same job with transformers: decompose into the device's target gateset (for example CZTargetGateset or SqrtIswapTargetGateset), map and route qubits with SWAPs, then optimize by merging operations and commuting Z gates through the circuit. A Cirq Device then validates the result; on Google's Sycamore, two-qubit gates can only run between qubits adjacent in the grid.

Routing is where connectivity turns into cost. If a circuit asks one qubit to interact with another on the far side of the chip, the compiler moves the state there step by step, and on hardware without a native SWAP each step costs three two-qubit gates. That is why the layout stage tries hard to find a placement that needs no SWAPs at all, and why fully connected hardware such as Helios needs no routing.

Here is the whole flow in Qiskit (written for Qiskit 2.5), with a simulated five-qubit chip whose qubits sit in a line and whose only two-qubit gate is CZ:

from qiskit import QuantumCircuit
from qiskit.providers.fake_provider import GenericBackendV2
from qiskit.transpiler import CouplingMap, generate_preset_pass_manager

# Entangle five qubits: qubit 0 must interact with every other qubit
qc = QuantumCircuit(5)
qc.h(0)
for target in range(1, 5):
    qc.cx(0, target)
qc.measure_all()

# A simulated chip: five qubits in a line, native gates CZ, RZ, SX and X
backend = GenericBackendV2(
    num_qubits=5,
    basis_gates=["cz", "rz", "sx", "x"],
    coupling_map=CouplingMap.from_line(5),
)
pm = generate_preset_pass_manager(optimization_level=3, backend=backend)
isa_circuit = pm.run(qc)

print("written: ", qc.depth(), dict(qc.count_ops()))
print("compiled:", isa_circuit.depth(), dict(isa_circuit.count_ops()))

Compare the two lines it prints. The compiled circuit uses only the chip's native gates (rz, sx, x and cz), has more two-qubit gates than the four CNOTs you wrote, because qubit 0 had to reach qubits that are not its neighbours, and is deeper. Run it a few times and the depth changes: SABRE is stochastic, and the simulated chip draws new error rates on each run unless you pass it a seed (and seed_transpiler to the pass manager). Qiskit's guide notes that many users compile several times and keep the shallowest result.

Why circuit depth and noise set the limits

A circuit's depth is the number of layers of gates executed in parallel, and because gates take time, depth roughly corresponds to how long the circuit runs (Qiskit). Two things go wrong during that time. Qubits lose their state: IBM reports T1, the relaxation time, and T2, the time a superposition keeps its phase, for every qubit, and the Willow chip Google used for error correction has a mean T1 of 68 microseconds. And every gate adds a little error. By 2024 the best many-qubit platforms had only recently reached 99.9% fidelity for entangling gates, while many applications need error rates below one in ten billion (Google Quantum AI, Nature).

Errors accumulate with every layer, so a circuit that is correct on paper can return a result dominated by noise. John Preskill named this the noisy intermediate-scale quantum (NISQ) era in 2018: noise in quantum gates limits the size of the circuits that can be executed reliably.

Three families of techniques push that limit back, at very different costs (IBM's guide):

Mitigation and early error correction both stretch what today's hardware can do, and in September 2026 IBM described a continuous path from mitigation to correction rather than a switch from one to the other. But a cost that grows exponentially with depth rules mitigation out for the long algorithms quantum computers are meant to run. That is the job of error correction.

What quantum error correction does

Quantum error correction encodes the information of one logical qubit into a larger set of physical qubits, so that errors on individual qubits can be found and undone (Microsoft Learn). Two things make it harder than classical error correction. A qubit can suffer a bit flip, like a classical bit, and also a phase flip, which has no classical equivalent. And you cannot simply read the data to check it, because measuring a qubit collapses its superposition.

The solution is to measure only parities. Extra qubits, called auxiliary or measure qubits, interact with groups of data qubits and are then measured. The pattern of results, the error syndrome, says which qubit most likely went wrong without revealing, or destroying, the encoded state. Peter Shor introduced quantum error correction in 1995, with a code that stores one logical qubit in nine physical qubits.

A code's distance is the minimum number of errors that turn one valid codeword into another: the smallest error the code cannot detect. A larger distance protects better, but it uses more qubits, and every added qubit is one more source of errors. Whether growing the code helps depends on the physical error rate compared with the code's threshold. Google's 2024 paper gives the rule of thumb: the logical error rate scales roughly as (physical error rate ÷ threshold) raised to the power (d + 1) ÷ 2. Below threshold, each step up in distance divides the logical error rate by a constant factor; above it, bigger codes make things worse.

Error detection is the weaker cousin. It flags that something went wrong so the run can be discarded (post-selection), but it cannot fix the error. Announcements often report both, and the difference matters: when Quantinuum launched Helios, it reported 94 error-detected and 48 error-corrected logical qubits, each performing better than the physical qubits.

How the surface code works

The surface code was the leading code by error threshold for some 20 years, according to IBM's 2024 paper, and it is the code Google used on Willow. Data qubits form a d × d grid. Between them sit measure qubits, each tied to a parity check (a stabilizer) on its neighbouring data qubits. A distance-d surface code therefore uses 2d² − 1 physical qubits per logical qubit: at distance 7, Google used 49 data qubits and 48 measure qubits, plus 4 qubits that remove leakage, for 101 in total.

Every cycle, each measure qubit reports whether its check changed. An error on one data qubit flips the checks next to it, and a classical decoder reads the stream of flipped checks and infers the most likely errors. It has to keep pace with the hardware. In Google's experiment a correction cycle took 1.1 microseconds, and its real-time decoder kept up for a million cycles at distance 5, with an average latency of 63 microseconds, while staying below threshold. In November 2025 IBM reported decoding its own codes in real time, in under 480 nanoseconds, on classical hardware.

The surface code's weakness is overhead; its strength is that it needs only nearest-neighbour connections on a square grid. Other approaches trade one for the other:

IBM's figures come from its March 2024 Nature paper, which simulated nearly a million syndrome cycles at a 0.1% physical error rate and found a threshold of 0.7%, on par with the surface code. IBM's Loon processor is built to test the "c-couplers" that make those longer links on one chip.

Quantum error correction milestones, 2023 to September 2026

Rows marked Nature were peer reviewed; the rest are the companies' own announcements, such as Microsoft's April 2024 post and IBM's June 2025 roadmap. Keep that in mind when comparing numbers across them.

What is still unsolved

Below-threshold memory was the proof of principle. Between it and large error-corrected algorithms sit problems that, as of September 2026, are still open:

• Overhead. Google estimates that at Willow's error rates, a logical error rate of one in a million would need a distance-27 surface code with 1,457 physical qubits per logical qubit. Better codes attack this from one side and better qubits from the other: by Google's estimate, halving physical error rates would improve that distance-27 qubit by four orders of magnitude.
• Decoding at scale. Syndrome data must be decoded as fast as the chip produces it, and the number of syndrome measurements per cycle grows quadratically with code distance.
• Correlated errors. Rare events that hit many qubits at once set a floor. In 2023 a single high-energy event set Google's repetition-code floor at about 1.7 in a million errors per cycle; in 2024, with newer hardware, rare correlated bursts about once an hour still left a floor near one in ten billion.
• Logic, not just memory. Google's below-threshold result protected stored qubits, a memory. Algorithms need logical gates, especially the T gates that IBM expects to define a fault-tolerant machine's capability, plus calibration, decoders and logical compilers that scale with them.
• Scale beyond one chip. IBM's plan links modules rather than building ever larger chips: Cockatoo is meant to entangle two Kookaburra modules through "L-couplers" in 2027, on the way to Starling in 2029.
• Proof of usefulness. Beyond-classical claims keep arriving, from Google's Quantum Echoes in October 2025 to three validated advantage demonstrations IBM and partners reported in July 2026. An open, community Quantum Advantage Tracker, to which IBM contributes, tests each claim against the best available classical methods.

Where you can run quantum circuits today

You do not need a lab to try any of this. Qiskit and Cirq are open-source Python libraries that build, compile and simulate circuits on a laptop. For real hardware, IBM Quantum Platform gives access to IBM's processors, and Amazon Braket offers one service for several vendors: as of September 2026 its documentation lists gate-based quantum computers from AQT, IonQ, IQM and Rigetti, plus an analog machine from QuEra that does not run circuits. Quantinuum offers Helios through its cloud service or on premises.

Used this way, a quantum processor is one more managed cloud service (Braket is an AWS service like any other), so the usual questions of access, cost and data handling apply. If that wider estate is what needs attention now, our cloud transformation service covers assessment, landing zones and migration in rehearsed waves, with a rollback at every stage. More on cloud platforms is in our cloud articles.